
SM320F2812-HT
SGUS062B–JUNE 2009 – REVISED JUNE 2011
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6.31 Flash Timing
6.31.1 Recommended Operating Conditions
Table 6-62. Flash Endurance Timing
(1)(2)
ERASE/PROGRAM
MIN NOM MAX UNIT
TEMPERATURE
N
f
Flash endurance for the array (write/erase cycles) -40°C to 125°C (ambient) 20000
(3)
50000
(3)
cycles
N
OTP
OTP endurance for the array (write cycles) -40°C to 125°C (ambient) 1 write
(1) Write/erase operations outside of the temperature ranges indicated are not specified and may affect the endurance numbers.
(2) Flash Timing Endurance is the minimum number of write/erase or write cycles specified over a programming temperature range of -40°C
to 125°C. Flash reads are supported within the recommended operating conditions specified in section 6.2.
(3) The write/erase cycle numbers of 20000 (MIN) and 50000 (TYP) are applicable only for silicon revision G. For older silicon revisions, the
write/erase cycle numbers of 100 (MIN) and 1000 (TYP) are applicable.
Table 6-63. Flash Parameters at 150-MHz SYSCLKOUT
(1) (2)
PARAMETER MIN TYP MAX UNIT
16-Bit Word 35 μs
Program
8K Sector 170 ms
Time
16K Sector 320 ms
8K Sector 10 s
Erase Time
16K Sector 11 s
Erase 75 mA
I
DD3VFLP
V
DD3VFL
current consumption during the Erase/Program cycle
Program 35 mA
I
DDP
V
DD
current consumption during Erase/Program cycle 140 mA
I
DDIOP
V
DDIO
current consumption during Erase/Program cycle 20 mA
(1) Typical parameters as seen at room temperature using flash API V1 including function call overhead.
(2) Not production tested.
Table 6-64. Flash/OTP Access Timing
(1) (2)
PARAMETER MIN TYP MAX UNIT
t
a(fp)
Paged Flash access time 36 ns
t
a(fr)
Random Flash access time 36 ns
t
a(OTP)
OTP access time 60 ns
(1) For 150 MHz, PAGE WS = 5 and RANDOM WS = 5
For 135 MHz, PAGE WS = 4 and RANDOM WS = 4
(2) Not production tested.
146 Electrical Specifications Copyright © 2009–2011, Texas Instruments Incorporated
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