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SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

EXTERNAL INTERRUPT TIMING

timing requirements for external interrupts

†

(see Figure 40)

NO.

−150

UNIT

NO.

MIN MAX

UNIT

w(ILOW)

Width of the NMI interrupt pulse low 2P ns

1 t

w(ILOW)

Width of the EXT_INT interrupt pulse low 4P ns

w(IHIGH)

Width of the NMI interrupt pulse high 2P ns

w(IHIGH)

Width of the EXT_INT interrupt pulse high 4P ns

†

P = 1/CPU clock frequency in ns. For example, when running parts at 100 MHz, use P = 10 ns.

EXT_INT, NMI

Figure 40. External/NMI Interrupt Timing

1 2 ... 80 81 82 83 84 85 86 87 88 89 90 ... 101 102

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Texas-instruments TMS320C6712D Bedienungsanleitung Seite 85