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Memory Interface Signals

Table 9–1. Primary Bus Interface Signals

STRB O/Z Primary interface access strobe 1 1

R/W O/Z Specifies memory read (active high) or write

(active low) mode

I Hold external memory interface NA

O/Z Hold acknowledge for external memory interface 1 1

I Indicates external primary interface is ready to

A (23–0) O/Z Primary address bus. When the primary bus

address lines are not in high-impedance state

due to HOLD signal, they keep in the last exter-

nal primary bus access.

HI Address of last external

I/O/Z Primary data bus. These signals go to high-

impedance between write accesses.

Z High impedance

NA means not affected.

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Texas-instruments TMS320C3x Bedienungsanleitung Seite 270