Texas Instruments TMS320DM355 Bedienungsanleitung

www.ti.comPRODUCT PREVIEW1 TMS320DM355 Digital Media System-on-Chip (DMSoC)1.1 FeaturesTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTE

www.ti.comPRODUCT PREVIEWW9DDR_CLK8DDR_CLK7654DDR_A0532DDR_A021VDDR_A07DDR_A04DDR_A00UVSSTPCLKRPNMLKDDR_A11DDR_A09DDR_A08VSSDDR_CASDDR_BA[2]DDR_A12DDR

www.ti.comPRODUCT PREVIEW5.5.2 MXI2 (27-MHz) Oscillator (optional oscillator)Crystal27MHzC1 C2MXI2MXO2 VSS_MX2L1VDDA_PLL2VSSA_PLL20.1 F1 FCLC1C2(C1C2

www.ti.comPRODUCT PREVIEW5.5.3 Clock PLL Electrical Data/Timing (Input and Output Clocks)MXI/CLKIN234451MXI/CLKIN234451TMS320DM355Digital Media System

www.ti.comPRODUCT PREVIEWCLKOUT11244MXI/CLKIN5 63MXI/CLKINCLKOUT21234564TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REV

www.ti.comPRODUCT PREVIEW5 612 344MXI/CLKINCLKOUT3TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Tab

www.ti.comPRODUCT PREVIEW5.6 General-Purpose Input/Output (GPIO)5.6.1 GPIO Peripheral Input/Output Electrical Data/TimingTMS320DM355Digital Media Syst

www.ti.comPRODUCT PREVIEWGPIxGPOx43215.6.2 GPIO Peripheral External Interrupts Electrical Data/TimingEXT_INTx21TMS320DM355Digital Media System-on-Chip

www.ti.comPRODUCT PREVIEW5.7 External Memory Interface (EMIF)5.7.1 Asynchronous EMIF (AEMIF)TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A –

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 20075.7.1.3 AEMIF Electrical Dat

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 5-14. Switching Charac

www.ti.comPRODUCT PREVIEWEM_CE[1:0]EM_BA[1:0]1312EM_A[13:0]EM_OEEM_D[15:0]EM_WE1059748631EM_CE[1:0]EM_BA[1:0]EM_A[13:0]EM_WEEM_D[15:0]EM_OE15116182022

www.ti.comPRODUCT PREVIEWCVDD19W18DDR_GATE017DDR_DQ1516DDR_DQ1315DDR_DQ1114DDR_DQ1013DDR_DQ0712DDR_DQ0511DDR_DQ0110DDR_WEEM_A13VVSSDDR_GATE1DDR_DQ14DD

www.ti.comPRODUCT PREVIEWEM_CE[1:0]11Asserted Deasserted2214EM_BA[1:0]EM_A[13:0]EM_D[15:0]EM_OEEM_WAITSETUP STROBE Extended Due to EM_WAIT STROBE HOLD

www.ti.comPRODUCT PREVIEW34333536373031Da Da+1 Da+2 Da+3 Da+4 Da+5 Da+nDa+n+1EM_CLKEM_CE[1:0]EM_ADVEM_BA0,EM_A[13:0],EM_BA1EM_D[15:0]EM_OEEM_WAIT3839T

www.ti.comPRODUCT PREVIEW5.7.2 DDR2 Memory ControllerTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007

www.ti.comPRODUCT PREVIEW5.8 MMC/SD5.8.1 MMC/SD Electrical Data/TimingTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVIS

www.ti.comPRODUCT PREVIEWSTARTXMIT Valid Valid Valid ENDSD_CLKSD_CMD137109131313START XMITValid Valid Valid ENDSD_CLKSD_CMD109712STARTD0 D1 Dx ENDSD_C

www.ti.comPRODUCT PREVIEW5.9 Video Processing Sub-System (VPSS) Overview5.9.1 Video Processing Front-End (VPFE)TMS320DM355Digital Media System-on-Chip

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007• Support for program lens s

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 20075.9.1.3 Hardware 3A (H3A)The

www.ti.comPRODUCT PREVIEWPCLK21344TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 20075.9.1.4 VPFE Electr

www.ti.comPRODUCT PREVIEWPCLK(Positive Edge Clocking)PCLK(Negative Edge Clocking)7,9HD/VDCI[7:0]/YI[7:0]/CCD[13:0]8,1011,1312,1456C_WE/C_FIELDPCLK

www.ti.comPRODUCT PREVIEW19181716151413121110EM_D05JEM_D02HEM_CE1GFEDCVDDBAEM_D03EM_D01EM_CE0EM_WEVSSEM_D00EM_ADVASP0_DXVSSA_PLL1CVDDEM_WAITASP0_FSXGI

www.ti.comPRODUCT PREVIEWPCLK(PositiveEdgeClocking)1820HDVDPCLK(NegativeEdgeClocking)5.9.2 Video Processing Back-End (VPBE)TMS320DM355Digital Medi

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007blending for that correspond

www.ti.comPRODUCT PREVIEW1PCLK2375648EXTCLK48TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007• Intern

www.ti.comPRODUCT PREVIEWVCLKIN(A)(Positive Edge Clocking)9VCLKIN(A)(Negative Edge Clocking)10VCTL(B)A. VCLKIN=PCLKorEXTCLKB. VCTL=HSYNC,VSYNC,

www.ti.comPRODUCT PREVIEWVCLK(Positive EdgeClocking)VCLK(Negative EdgeClocking)17VCTL(B)VDATA(C)1918222123242526VCLKIN(A)A. VCLKIN=PCLKorEXTCLKB.

www.ti.comPRODUCT PREVIEWDIN<9:0>MSBLSBDACDigitalInputExampleforExternalCircuitIout[mA]1.4mA0DACOutputCurrentCBG0.1 FmVREFVideoDACRBI

www.ti.comPRODUCT PREVIEWDIN<9:0>DACDigitalInputCBG0.1 FmVREFVideoDACandBufferRBIAS2550 ΩIBIASRfb= 1000 ΩIOUT VFB TVOUTRout=1070 ΩTVmon

www.ti.comPRODUCT PREVIEW5.10 USB 2.05.10.1 USB2.0 Electrical Data/TimingTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – RE

www.ti.comPRODUCT PREVIEWtrtfVCRS90%VOH10%VOLUSB_DMUSB_DPtper −tjrVSS_USB_REFUSB_R1USB10K ±1%WTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS46

www.ti.comPRODUCT PREVIEW5.11 Universal Asynchronous Receiver/Transmitter (UART)5.11.1 UART Electrical Data/TimingTMS320DM355Digital Media System-on-C

www.ti.comPRODUCT PREVIEW2.4 Pin Functions2.4.1 Image Data Input - Video Processing Front EndTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A –

www.ti.comPRODUCT PREVIEW32StartBitDataBitsUART_TXDnUART_RXDn5DataBitsBitStart4TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2

www.ti.comPRODUCT PREVIEW5.12 Serial Port Interface (SPI)5.12.1 SPI Electrical Data/TimingSPIx_CLK(ClockPolarity=0)123SPIx_CLK(ClockPolarity=1)T

www.ti.comPRODUCT PREVIEWSPI_CLK(ClockPolarity=0)SPI_CLK(ClockPolarity=1)SPI_DI(Input)SPI_DO(Output)4MSBIN DATA LSBINLSBOUTMSBOUT DATA910865

www.ti.comPRODUCT PREVIEWSPI_CLK(ClockPolarity=0)SPI_CLK(ClockPolarity=1)SPI_DI(Input)SPI_DO(Output)13MSBIN DATA LSBINLSBOUTMSBOUTDATA171514

www.ti.comPRODUCT PREVIEW5.13 Inter-Integrated Circuit (I2C)TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMB

www.ti.comPRODUCT PREVIEW5.13.1 I2C Electrical Data/Timing1084371256142313Stop Start RepeatedStartStopSDASCL111 9TMS320DM355Digital Media System-on-Ch

www.ti.comPRODUCT PREVIEW231918222021171828Stop Start RepeatedStartStopSDASCL16TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 200

www.ti.comPRODUCT PREVIEW5.14 Audio Serial Port (ASP)TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007

www.ti.comPRODUCT PREVIEW5.14.1 ASP Electrical Data/TimingTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER

www.ti.comPRODUCT PREVIEWBit(n-1) (n-2) (n-3)Bit0 Bit(n-1) (n-2) (n-3)14111093328654413(A)13(A)A. ParameterNo.13appliestothefirstdatabitonly

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-5. CCD Controller/Vi

www.ti.comPRODUCT PREVIEWBit0 Bit(n-1) (n-2) (n-3) (n-4)Bit0 Bit(n-1) (n-2) (n-3) (n-4)M31M30M26M27M25M24CLKXFSXDXDRM33TMS320DM355Digital Media Syst

www.ti.comPRODUCT PREVIEWBit0 Bit(n-1) (n-2) (n-3) (n-4)Bit0 Bit(n-1) (n-2) (n-3) (n-4)M39M36M38M37M35M34CLKXFSXDXDRM40M42TMS320DM355Digital Media S

www.ti.comPRODUCT PREVIEWBit0 Bit(n-1) (n-2) (n-3) (n-4)Bit0 Bit(n-1) (n-2) (n-3) (n-4)M50M49M45M46M44M43CLKXFSXDXDRM52TMS320DM355Digital Media Syst

www.ti.comPRODUCT PREVIEWBit0 Bit(n-1) (n-2) (n-3) (n-4)Bit0 Bit(n-1) (n-2) (n-3) (n-4)M59M58M55M57M56M54M53CLKXFSXDXDRM62TMS320DM355Digital Media S

www.ti.comPRODUCT PREVIEW5.15 Timer5.15.1 Timer Electrical Data/Timing12443TIM_INTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2

www.ti.comPRODUCT PREVIEW5.16 Pulse Width Modulator (PWM)5.16.1 PWM0/1/2/3 Electrical/Timing DataPWM0/1/2/31332TMS320DM355Digital Media System-on-Chip

www.ti.comPRODUCT PREVIEW4VD(CCDC)44INVALIDINVALIDINVALIDVALIDVALIDVALIDPWM0PWM1PWM24INVALID VALIDPWM3TMS320DM355Digital Media System-on-Chip (DMSoC)S

www.ti.comPRODUCT PREVIEW5.17 Real Time Out (RTO)5.17.1 RTO Electrical/Timing DataRTO0/1/2/313324TINT12/TINT34(Timer3)44INVALIDINVALIDINVALIDVALIDVALI

www.ti.comPRODUCT PREVIEW5.18 IEEE 1149.1 JTAGTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007The JTA

www.ti.comPRODUCT PREVIEW5.18.1 JTAG Test-Port Electrical Data/TimingRTCKTDOTDI45TMS67TCK123TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A –

www.ti.comPRODUCT PREVIEW2.4.2 Image Data Output - Video Processing Back End (VPBE)TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER

www.ti.comPRODUCT PREVIEWRTCKTDO138910TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 5-49. Swi

www.ti.comPRODUCT PREVIEW6 Revision HistoryTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007This data

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007ADDS/CHANGES/DELETESUpdated

www.ti.comPRODUCT PREVIEW7 Mechanical Data7.1 Thermal Data for ZCE7.1.1 Packaging InformationTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A –

IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,improvemen

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-6. Signals for VPBE

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-7. Digital Video Ter

www.ti.comPRODUCT PREVIEW2.4.3 Asynchronous External Memory Interface (AEMIF)TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-9. Asynchronous EMIF

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007– IEEE-1149.1 (JTAG) • 337-P

www.ti.comPRODUCT PREVIEW2.4.4 DDR Memory InterfaceTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Ta

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-10. DDR Terminal Fun

www.ti.comPRODUCT PREVIEW2.4.5 GPIOTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007The General Purpos

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-11. GPIO Terminal Fu

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-11. GPIO Terminal Fu

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-11. GPIO Terminal Fu

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-11. GPIO Terminal Fu

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-11. GPIO Terminal Fu

www.ti.comPRODUCT PREVIEW2.4.6 Multi-Media Card/Secure Digital (MMC/SD) InterfacesTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER

www.ti.comPRODUCT PREVIEW2.4.7 Universal Serial Bus (USB) Interface2.4.8 Audio InterfacesTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEP

www.ti.comPRODUCT PREVIEW1.2 DescriptionTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007The DM355 is

www.ti.comPRODUCT PREVIEW2.4.9 UART InterfaceTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-

www.ti.comPRODUCT PREVIEW2.4.10 I2C Interface2.4.11 Serial InterfaceTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED

www.ti.comPRODUCT PREVIEW2.4.12 Clock InterfaceTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table

www.ti.comPRODUCT PREVIEW2.4.13 Real Time Output (RTO) Interface2.4.14 Pulse Width Modulator (PWM) InterfaceTMS320DM355Digital Media System-on-Chip (D

www.ti.comPRODUCT PREVIEW2.4.15 System Configuration InterfaceTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTE

www.ti.comPRODUCT PREVIEW2.4.16 EmulationTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-21.

www.ti.comPRODUCT PREVIEW2.5 Pin ListTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23 provi

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEW1.3 Functional Block DiagramPeripherals64bitDMA/DataBusJTAG24MHz 27MHz(optional)CCD/CMOSModuleDDR2/MDDR16CLOCKPLLCLOCKc

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWContentsTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 20071 TMS320DM355 Digita

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-23. DM355 Pin Descri

www.ti.comPRODUCT PREVIEW2.6 Device Support2.6.1 Development Tools2.6.2 Device NomenclatureTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – S

www.ti.comPRODUCT PREVIEWDM355PREFIXTMX320 DM355ZCETMX = ExperimentaldeviceTMS = QualifieddeviceDEVICEFAMILY320 = TMS320 DSP familyPACKAGE TYPE(A)Z

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Digital Media System-on-Chip

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007SPRUEE7 TMS320DM35x DMSoC Pu

www.ti.comPRODUCT PREVIEW3 Detailed Device Description3.1 ARM Subsystem Overview3.1.1 Components of the ARM SubsystemTMS320DM355Digital Media System-o

www.ti.comPRODUCT PREVIEW2 Device Overview2.1 Device CharacteristicsTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED

www.ti.comPRODUCT PREVIEWARM926EJ-S16KI$8KD$ MMUCP15Arbiter ArbiterI-AHBD-AHBMasterIFDMAbusI-TCMD-TCM16KRAM0RAM116KROM8KArbiterSlaveIFMasterIFCFG

www.ti.comPRODUCT PREVIEW3.2.1 CP153.2.2 MMU3.2.3 Caches and Write BufferTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – RE

www.ti.comPRODUCT PREVIEW3.2.4 Tightly Coupled Memory (TCM)3.2.5 Advanced High-performance Bus (AHB)3.2.6 Embedded Trace Macrocell (ETM) and Embedded

www.ti.comPRODUCT PREVIEW3.3.2 External Memories3.3.3 Peripherals3.4 ARM Interrupt Controller (AINTC)3.4.1 Interrupt MappingTMS320DM355Digital Media S

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 3-1. AINTC Interrupt C

www.ti.comPRODUCT PREVIEW3.5 Device Clocking3.5.1 OverviewTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER

www.ti.comPRODUCT PREVIEWARMsubsystemMPEG/JPEGCoprocessorSYSCLK1SYSCLK2VPFEVPBEDACDDRPHYDDRPLLDIV1(/1)BPDIV(/8)PLL controller2PLL controller1PLL

www.ti.comPRODUCT PREVIEW3.5.2 Supported Clocking Configurations for DM355-216TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 20073.5.2.2 Supported Clocking C

www.ti.comPRODUCT PREVIEW3.5.3 Supported Clocking Configurations for DM355-270TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007

www.ti.comPRODUCT PREVIEW2.2 Memory Map SummaryTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 3-7. PLL2 Supported Cl

www.ti.comPRODUCT PREVIEW3.5.4 Peripheral Clocking ConsiderationsTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SE

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007divided internally by three)

www.ti.comPRODUCT PREVIEW3.6 PLL Controller (PLLC)3.6.1 PLL Controller ModuleTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007

www.ti.comPRODUCT PREVIEW3.6.2 PLLC1TMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007PLLC1 provides mo

www.ti.comPRODUCT PREVIEWPLLDIV1(/2)PLLDIV2(/4)PLLDIV3(/3)SYSCLK1(ARMandMPEG/JPEGCoprocessor)SYSCLK2(peripherals)SYSCLK3(VPBE)10PLL01CLKMODECLKIN

www.ti.comPRODUCT PREVIEW3.6.3 PLLC2PLLDIV1(/1)10PLL01CLKMODECLKINOSCINPLLENSYSCLK1(DDRPHY)SYSCLKBP(CLKOUT3)BPDIV(/8)PLLM(programmable)Pre-DIV(prog

www.ti.comPRODUCT PREVIEW3.7 Power and Sleep Controller (PSC)arm_clockarm_mresetarm_powerAINTCARMmodule_powermodule_mresetMODxmodule_clockAlwaysondom

www.ti.comPRODUCT PREVIEW3.9 Pin Multiplexing3.9.1 Hardware Controlled Pin MultiplexingTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTE

www.ti.comPRODUCT PREVIEW3.9.2 Software Controlled Pin Multiplexing3.10 Device ResetTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBE

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 2-3. DM355 ARM Configu

www.ti.comPRODUCT PREVIEW3.11 Default Device Configurations3.11.1 Device Configuration PinsTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – S

www.ti.comPRODUCT PREVIEW3.11.2 PLL Configuration3.11.3 Power Domain and Module State ConfigurationTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table 3-16. Module Configura

www.ti.comPRODUCT PREVIEW3.11.4 ARM Boot Mode Configuration3.11.5 AEMIF Configuration3.12 Device Boot ModesTMS320DM355Digital Media System-on-Chip (DM

www.ti.comPRODUCT PREVIEW3.12.1 Boot Modes OverviewTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Th

www.ti.comPRODUCT PREVIEWBootmode?ResetBootmode?BootfromNANDflashInternalROMBootOK?NoYesBootfromUARTBootfromMMC/SDBootOK?BootOK?YesNoInvoke

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007to static current leakage an

www.ti.comPRODUCT PREVIEW3.14 64-Bit Crossbar Architecture3.14.1 Crossbar Connections3.14.2 EDMA ControllerTMS320DM355Digital Media System-on-Chip (DM

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007The EDMA Controller consists

www.ti.comPRODUCT PREVIEWTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007DMA Channels: Can be trigger

www.ti.comPRODUCT PREVIEW2.3 Pin Assignments2.3.1 Pin Map (Bottom View)9J8VSSA_PLL27VDDA33_USB65431HGVDDA13_USBVSSFEDCIN2CBAVREFCIN3CIN0VDDA_PLL2VSSLC

www.ti.comPRODUCT PREVIEW3.15 MPEG/JPEG OverviewTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007Table

www.ti.comPRODUCT PREVIEW4 Device Operating Conditions4.1 Absolute Maximum Ratings Over Operating Case Temperature RangeTMS320DM355Digital Media Syste

www.ti.comPRODUCT PREVIEW4.2 Recommended Operating ConditionsTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEM

www.ti.comPRODUCT PREVIEW4.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and OperatingTMS320DM355Digital Media System-on-Chip

www.ti.comPRODUCT PREVIEW5 Peripheral Information and Electrical Specifications5.1 Parameter Information Device-Specific InformationTransmissionLine4

www.ti.comPRODUCT PREVIEW5.1.2 Timing Parameters and Board Routing AnalysisTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 –

www.ti.comPRODUCT PREVIEW5.2 Recommended Clock and Control Signal Transition Behavior5.3 Power SuppliesTMS320DM355Digital Media System-on-Chip (DMSoC)

www.ti.comPRODUCT PREVIEW5.3.1 Power-Supply SequencingTMS320DM355Digital Media System-on-Chip (DMSoC)SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 200

www.ti.comPRODUCT PREVIEW5.4 Reset5.4.1 Reset Electrical Data/Timing123RESETBootConfigurationPins(BTSEL[1:0],AECFG[3:0])TMS320DM355Digital Media Sy

www.ti.comPRODUCT PREVIEW5.5 Oscillators and Clocks5.5.1 MXI1 (24-MHz) OscillatorCrystal24MHzor36MHzC1 C2MXI1/CLKINMXO1 VSS_MX10.1 F1 FL1VDDA_PLL1V