Texas-instruments THUNDERSWITCH II TNETX4090 Bedienungsanleitung PDF herunterladen

TNETX4090

ThunderSWITCH II



9-PORT 100-/1000-MBIT/S ETHERNET



SWITCH

SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Single-Chip 100-/1000-Mbit/s Device

Integrated Physical Coding Sublayer (PCS)

Logic Provides Direct Interface to Gigabit

Transceivers

Integrated Address-Lookup Engine and

Table Memory for 2-K Addresses

Supports IEEE Std 802.1Q Virtual-LAN

(VLAN) Tagging Scheme

Provides Data Path for Network

Management Information [No External

Media-Access Control (MAC) Required]

Full-Duplex IEEE Std 802.3 Flow Control

Half-Duplex Back-Pressure Flow Control

Fully Nonblocking Architecture Using

High-Bandwidth Rambus Memory

Simple Expansion Via the Gigabit Interface

for Higher-Density Port Solutions

Port Trunking/Load Sharing for

High-Bandwidth Interswitch Links

Supports Pretag Extended Port Awareness

EEPROM Interface for Autoconfiguration

(No CPU Required for Nonmanaged Switch)

Provides Direct Input/Output (DIO) Interface

for Configuration and Statistics Information

Supports On-Chip Per-Port Storage for

Etherstat and Remote Monitoring (RMON)

Management Information Bases (MIBs)

Fabricated in 2.5-/3.3-V Low-Voltage

Technology

Supports Ring-Cascade Mode

Supports Spanning Tree

Packaged in 352-Terminal Ball Grid Array

Package

description

The TNETX4090 is a 9-port 100-/1000-Mbit/s nonblocking Ethernet switch with an on-chip address-lookup

engine. The TNETX4090 provides a low-cost, high-performance switch solution. The TNETX4090 is a fully

manageable desktop switch solution achieved by combining the TNETX4090 with physical interfaces and

high-bandwidth rambus-based packet memory and a CPU. The TNETX4090 also provides an interface capable

of receiving and transmitting simple-network management protocol (SNMP) and bridge protocol data units

(BPDU) (spanning tree) frames.

The TNETX4090 provides eight 10-/100-Mbit/s interfaces and one 100-/1000-Mbit/s interface. In half-duplex

mode, all ports support back-pressure flow control to reduce the risk of data loss for a long burst of activity. In

the full-duplex mode of operation, the device uses IEEE Std 802.3 frame-based flow control. With full-duplex

capability, ports 0–7 support 200-Mbit/s aggregate bandwidth connections. Port 8 supports 2 Gbit/s to desktops,

high-speed servers, hubs, or other switches in the full-duplex mode. The physical coding sublayer (PCS)

function is integrated on chip to provide a direct 10-bit interface to the gigabit Ethernet transceiver. The

TNETX4090 also supports port trunking/load sharing on the 10-/100-Mbit ports. This can be used to group ports

on interswitch links to increase the effective bandwidth between the systems. In the ring-cascade mode, port 8

can be used to connect multiple devices in a ring topology, which provides a low-cost, high-port-density desktop

switch. Pretagging and extended port awareness allow the TNETX4090 to be used as a front end to a router

or crossbar switch to build a cost-effective, high-density, high-performance system.

The internal address-lookup engine (IALE) supports up to 2-K unicast/multicast and broadcast addresses and

up to 64 IEEE Std 802.1Q VLANs. For interoperability, each port can be programmed as an access port or

non-access port to recognize VLAN tags and transmit frames with VLAN tags to other systems that support

VLAN tagging. The IALE performs destination- and source-address comparisons and forwards unknown

source- and destination-address packets to ports specified via programmable masks.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TI, ThunderSWITCH, and ThunderSWITCH II are trademarks of Texas Instruments Incorporated.

Ethernet and Etherstat are trademarks of Xerox Corporation.

Secure Fast Switching is a trademark of Cabletron Systems, Inc.

Port-trunking and load-sharing algorithms were contributed by Cabletron Systems, Inc. and are derived from, and compatible with, Secure Fast

Switching.

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Inhaltsverzeichnis

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TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 19991POST OFFICE BOX 655303 • DALLAS, T

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TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 199910POST OFFICE BOX 655303 • DALLAS, T

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Seite 7 - Terminal Functions

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Seite 10 - • DALLAS, TEXAS 75265

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Seite 14 - MII management interface

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Seite 15 - RDRAM interface

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Seite 16 - EEPROM interface

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Seite 17 - LED interface

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Seite 18 - DIO interface description

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TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 19993POST OFFICE BOX 655303 • DALLAS, TE

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Seite 25 - Table 3. Port Statistics 1

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Seite 26 - Table 4. Port Statistics 2

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Seite 31 - PHY management interface

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Seite 32 - MAC interface

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Seite 33

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Seite 43 - EEPROM interface (continued)

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Seite 45 - PCS duplex LED

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Seite 47 - JTAG interface

TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 199951POST OFFICE BOX 655303 • DALLAS, T

Seite 48 - Figure 11. VLAN Overview

TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 199952POST OFFICE BOX 655303 • DALLAS, T

Seite 49

TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 199953POST OFFICE BOX 655303 • DALLAS, T

Seite 50 - VLAN Support

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Seite 51

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Seite 52

TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 199956POST OFFICE BOX 655303 • DALLAS, T

Seite 53 - Port Trunking/Load Sharing

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Seite 54 - Trunking

TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 199958POST OFFICE BOX 655303 • DALLAS, T

Seite 55

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Seite 56

TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 19996POST OFFICE BOX 655303 • DALLAS, TE

Seite 57

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Seite 58

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Seite 59

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Seite 60

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Seite 61 - RESET (see Figure 15)

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Seite 62 - PMA receive (see Figure 16)

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Seite 63 - PMA transmit (see Figure 17)

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Seite 64 - GMII transmit (see Figure 19)

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Seite 65 - Figure 20. GMII Clock

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Seite 66 - MII receive (see Figure 21)

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Seite 67 - MII clock (see Figure 23)

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Seite 68 - RDRAM (see Figure 24)

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Seite 69 - Figure 25. DIO and DMA Writes

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Seite 70 - Figure 26. DIO and DMA Reads

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Seite 71 - EEPROM reads (see Figure 28)

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Seite 72 - LED (see Figure 29)

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Seite 73

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Seite 74

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Seite 75

PACKAGING INFORMATIONOrderable Device Status(1)PackageTypePackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)TNETX4090GGP OBSOLE

Seite 76 - MECHANICAL DATA

IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improveme

Seite 77 - PACKAGE OPTION ADDENDUM

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Seite 78 - IMPORTANT NOTICE

TNETX4090ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNET SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 19999POST OFFICE BOX 655303 • DALLAS, TE

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Texas-instruments THUNDERSWITCH II TNETX4090 Bedienungsanleitung

Stöbern Sie online oder laden Sie Bedienungsanleitung nach Computerzubehör Texas-instruments THUNDERSWITCH II TNETX4090 herunter. Texas Instruments THUNDERSWITCH II TNETX4090 User Manual Benutzerhandbuch

Inhaltsverzeichnis

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